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An image sensor comprising an array of apertures each with its own local integrated optics and pixel array is presented. A lens focuses the image above the sensor creating overlapping elds of view bet...
Multiple Capture Single Image Architecture with a CMOS Sensor
Multiple Capture Single Image Architecture CMOS Sensor
2015/8/17
We describe a programmable digital camera sensor with pixel-level analog-to-digital conversion (ADC). The sensor, which was designed and implemented by our group, is programmable in the sense that the...
A single-photon sampling architecture for solid-state imaging sensors
A single-photon sampling architecture solid-state imaging sensors
2015/6/17
Advances in solid-state technology have enabled the development of silicon photomultiplier sensor arrays capable of sensing individual photons. Combined with high-frequency time-todigital converters (...
Efficient Macroblock Pipeline Structure in High Definition AVS Video Encoder VLSI Architecture
Efficient Macroblock Pipeline Structure AVS Video Encoder VLSI Architecture
2010/12/21
In traditional four-stage pipeline structures for H.264 video encoder hardware implementation, rate distortion optimization (RDO) based mode decision was turned off, and
dual-port or ping-pang on-chi...
High Throughput VLSI Architecture for Multiresolution Motion Estimation in High Definition AVS Video Encoder
VLSI Architecture Multiresolution Motion Estimation Video Encoder
2010/12/21
This paper proposes a hardware friendly multiresolution motion estimation algorithm and VLSI architecture for high definition MPEG-like video encoder hardware implementation. By parallel searching and...
A Motion Vector Predictor Architecture for AVS and MPEG-2 HDTV Decoder,
Motion compensation Motion vector prediction AVS MPEG
2010/12/16
In the advanced Audio Video coding Standard (AVS), many efficient coding tools are adopted in motion compensation, such as new motion vector prediction, direct mode matching, variable block-sizes etc....
An Implemented VLSI Architecture of Inverse Quantizer for AVS HDTV Video Decoder
VLSI Architecture Inverse Quantizer AVS HDTV Video Decoder
2010/12/15
AVS is Chinese new audio and video coding standard. A pipeline-based architecture of inverse quantizer for AVS video standard is proposed in this paper. Due to using one-pass processing for Run Length...