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5/3提升小波的FPGA动态RAM结构设计及其应用
动态RAM 5/3提升小波 FPGA 时间延迟积分CCD
2014/3/18
为了改善高分辨率TDICCD成像系统图像数据的高速传输特性，设计了FPGA内部实现5/3提升小波的动态RAM结构。该结构通过循环利用同一RAM资源进行图像数据的同时读写，解决了5/3提升小波在FPGA实现过程中的RAM不足问题，提高了RAM资源利用的有效性。试验表明，5/3提升小波在FPGA内部的动态RAM实现过程，具有实时性高、可靠性好、占用资源较小等优点。该方法在图像预压缩、图像去噪、图像实时...
All-optical RAM Buffer Subsystem Demonstrator
All-optical RAM Buffer Subsystem Demonstrator
2015/5/20
A comprehensive R&D program aiming at all-optical RAM buffer subsystem for optical packet switching will be presented, featuring nano-cavity based optical bit memory, a unique beam addressing optics, ...
All-Optical Static RAM Cell with Read/Write functionality at 5 Gb/s
All-Optical Static RAM Cell Read/Write functionality
2015/8/3
We demonstrate an optical static RAM cell that comprises two SOA-based switches and an integrated SOA-MZI Flip-Flop, providing random access read/write functionality at 5 Gb/s.
期刊信息
篇名
Low-Threshold-Current and High-Out-Power 660nm Laser Diodes with a P-GaAs Current Blocking Layer for DVD-RAM/R
语种
英文
撰写或编译
撰写
作者
Zheng Kai (郑凯),Ma XiaoYu (马骁宇),Lin Tao (林涛),Wang Jun (王俊),Liu S...