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A stochastic model for interconnections in integrated circuits composed of unequal size logic blocks separated by routing channels is described. An algorithm, based on the model, is given for estimati...
A method for the electrical parameters analysis and modelling of lossy-coupled multilayer on-chip interconnection lines at high bit rates is presented in detail. It can be used by the VLSI designer to...
Modern manufacturing techniques which have been developed in respect of interconnection and packaging systems using printed circuit boards, are outlined. It is shown that these systems are capable of ...

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